Measurements of capacitance versus an applied DC voltage (CV measurements) are essential in controlling the processes used in making integrated circuits. These measurements are most commonly done on silicon wafers covered with a high quality oxide or other insulating material as the dielectric needed for MOS (metal oxide semiconductor) devices. The purpose of these CV measurements is to control the electrical properties of both the dielectric material and the underlying silicon wafer.
A specific device for making CV measurements utilizing a mercury column contact supported by a kinematically-stable probe arm is described in U.S. Pat. No. 5,036,271.
More generally, these CV measurements have been made using fabricated MOSCAPS (MOS capacitors) involving a deposited metal or polysilicon gate material as the upper plate of a test MOS diode (ASTM F1153-92). While such fabricated MOSCAP measurements have proven useful, there are a number of serious problems with this approach:
1) the process used in fabricating the MOS diodes uses a series of photolithographic steps and is therefore time consuming (typically one to two weeks); PA1 2) the MOS diode fabrication process is costly--involving a need for extra processing equipment, materials (expensive metals and chemicals) and extra labor. In addition, there is a significant cost due to lost device throughput as production equipment must often wait for CV test results; PA1 3) there is a loss of wafer throughput due to the need to have a monitor wafer specifically fabricated with MOS test diodes for test purposes; and PA1 4) the material properties being measured may be affected by the processing needed to fabricate the test MOS diode structures.
Therefore, there has for some years been an increasing interest in test techniques that do not require fabrication of test MOS diodes. In particular, several noncontact CV test methods have been developed to avoid the negative aspects of the conventional fabricated MOS diode approach. See, for example, U.S. Pat. No. 5,233,291. However, achieving parallelism of the face of the measuring head and test wafer is very time consuming in the prior noncontact techniques.
The most often used of these noncontact techniques depends on placement of a conductive plate a small distance above the surface of a bare or dielectric-coated wafer. If the air gap thickness is small enough (less than 1 micron), the series capacitance associated with the air gap is large enough that the silicon, oxide, etc. capacitance components may be studied via CV measurements.
Typically, if the air gap is in the range of 0.35 micron to 0.8 micron, the voltage drop across the semiconductor or dielectric-on-semiconductor structure, while only a small fraction of the total applied voltage, is sufficient to allow measurement of a number of the most useful silicon and dielectric properties.
In the case of bare silicon wafers, these noncontact techniques are restricted to very near surface profiling of relatively high resistivity silicon wafers (above about 1 ohm cm material).
However, for dielectric-coated MOS wafers, noncontact CV methods are very sensitive to total oxide charge. Total oxide charge is related to the quality of critical process conditions, such as annealing, furnace leaks, ionic and metallic contamination and oxide stoichiometry. Noncontact CV can also be done on oxidized or dielectric-coated wafers in such a way that these measurements yield complete information on several critical oxide charge components. Thus, the application of noncontact CV is very useful in MOS device process control.
The accuracy and sensitivity of the noncontact capacitance measurements depend upon the distance between the measuring capacitor plate and the wafer surface (the closer the better) and on positioning the capacitor plate precisely parallel to the surface.